T-CREST/parMERASA/CERTAINTY Workshop
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Thursday, 10 July 2014
Madrid, Spain
The workshop will be at UPM, where the ECRTS workshops will be held.
Details on the following ECRTS pages:
Local info: http://ecrts.eit.uni-kl.de/index.php?id=156
map showing UPM and conference hotel:
https://mapsengine.google.com/map/edit?mid=zwqH1n2GIPqk.kDUEdQkDbR1M
Program:
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Introduction to T-CREST, parMERASA, and CERTAINTY
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9:00 - 9:20 T-CREST: Time-predictable Multi-Core Architecture for Embedded Systems
Martin Schoeberl, Technical University of Denmark
9:20 - 9:40 parMERASA Overview - Objectives and Achievements
Theo Ungerer, University of Augsburg, Germany
9:40 - 10:00 CERTAINTY: Certification of Real time applications designed for mixed criticality
M. Faugère, THALES Research and Technology, France
10:00 - 10:20 Dynamic Budgeting for Settling DRAM Contention of Co-running
Mixed-Criticality Applications on Multicores,
Martin Stigge, Uppsala University, Sweden
10:20 - 10:40 Break
T-CREST
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10:40 - 11:00 Improving the average-case using worst-case aware prefetching
Jamie Garside, University of York
11:00 - 11:20 Argo: A Real-Time Network-on-Chip Architecture with an Efficient GALS Implementation
Evangelia Kasapaki, Technical University of Denmark
11:20 - 11:40 Function Splitting for the Patmos Method Cache
Stefan Hepp, Vienna University of Technology
11:40 - 12:00 Single-Path Code Generation and Input-Data Dependence Analysis
Daniel Prokesch, Vienna University of Technology
12:00 - 12:20 Time-Predictable Caching of Stack Data, Sahar Abbaspourseyedi
Technical University of Denmark
12:20 - 12:40 Branching in the time-predictable processor Patmos
Wolfgang Puffitsch, Technical University of Denmark
12:40 - 13:40 Lunch
parMERASA
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13:40 - 14:00 Systematic and Timing-analyzable Parallelization of Industrial Applications
Martin Frieb, University of Augsburg, Germany
14:00 - 14:20 Towards Parallelization of Automotive Legacy Software
Sebastian Kehr, Denso Deutschland GmbH
14:20 - 14:40 Static timing analysis of parallel applications
Haluk Ozaktas or Christine Rochange, University of Toulouse, France
14:40 - 15:00 Multi-core architectures for hard real-time systems
Milos Panic, Barcelona Supercomputing Center, Spain
15:00 - 15:20 Break
CERTAINTY
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15:20 - 15:40 Scheduling, mapping and interference analysis for mixed-critical
applications on multi-core platforms,
Nikolay Stoimenov, Eidgenössische Technische Hochschule Zürich, Switzerland
15:40 - 16:00 Composability and scheduling
Petro Poplavko, Verimag, France
16:00 - 16:20 NoC modeling and computation of worst-case traversal bounds on MPPA
B. Dinechin, Kalray, France
16:20 - 16:40 Fault modeling at NoC level
A. Tschiene, Technische Universität Braunschweig, Germany
16:40 - 17:00 Static Code-Level Timing and Stack Usage Analysis; Tool demo
C. Ferdinand, Absint, Germany
Last changed: Jul 03 2014 at 9:54 AM
The research leading to these results has received funding from the European Union Seventh Framework Programme (FP7/2007-2013) under grant agreement n° 288175
DR. Madeleine FAUGÈRE
THALES S.A.