UJF-Verimag has developed the BIP Framework for model-based and component-based design of distributed embedded systems. This framework uses a minimal yet powerful set of constructs and principles, which makes this methodology simple, but expressive enough to encompass different sources of heterogeneity such as different synchronization protocols and different levels of abstraction. BIP treats interactions and system architectures as first class entities that can be composed and analyzed independently of the behavior of individual components. BIP has been applied in several domains: Large-Scale Heterogeneous Real-time Systems, Autonomous Systems and Programming Manycore Platforms.
UJF-Verimag’s expectations from the CERTAINTY project are to enhance the hard real-time verification and statistical model checking methodologies of BIP by a highly automated mapping flow for mixed-critical systems on predictable manycore platforms.
The research leading to these results has received funding from the European Union Seventh Framework Programme (FP7/2007-2013) under grant agreement n° 288175
DR. Madeleine FAUGÈRE